Parity channel code for enhancing the operation of a remod/demod sequence detector in a d=1 sampled amplitude read channel
US6052248A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 30, 1998 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Jan 30, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/10064
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A sampled amplitude read channel is disclosed for disk storage systems employing a run-length limited (RLL) d=1 channel code which compensates for partial erasure, and a parity channel code for enhancing the operation of a remod/demod sequence detector. During a write operation, after encoding the user data into codewords comprising the RLL d=1 constraint, the parity over one interleave of a block of NRZI bits is computed and two parity bits appended to form a parity codeword. For an even number of "1" bits in the block, the parity bits are set to "00". For an odd number of "1" bits in the block, the parity bits are set to "10" if the codeword ends with a "0" bit and to "01" if the codeword ends with a "1" bit, thereby maintaining the RLL d=1 constraint. Thus, a parity codeword will always comprise an even number of "1" bits (even parity). During read back, a parity syndrome is generated over a detected parity codeword; if the parity syndrome indicates the codeword comprises an odd number of "1" bits (odd parity), then the codeword is corrected according to the most likely error made by the remod/demod sequence detector. As a result, the remod/demod sequence detector of the present…
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