Bit-wise conditional write method and system for an MRAM
US6052302A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 27, 1999 |
| Grant date | Apr 18, 2000 |
| Priority date | — |
| Expiry date | Sep 27, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2263
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bit-wise conditional write method and apparatus to minimize power consumption in integrated circuit (IC) magnetoresistive random access memory (MRAM) systems. In a first embodiment, the current logic state of each data bit of a word stored in the MRAM is compared to a corresponding input bit and only those stored data bits which are different are written. In a second embodiment, for each stored data bit which is not being written, the current logic state is guarded against inadvertent modification when other data bits of the word are written. In a third embodiment, if the logic states of a majority of the stored data bits comprising a word are different from the logic states of the respective input bits, the input bits are first complemented so that less than a majority of the stored data bits actually need to be changed, and a complement bit, appended to each word in the MRAM, is set to indicate that the correct logic states of the stored data bits comprising the respective word must be restored upon subsequent readout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.