Synchronous semiconductor memory device exhibiting an operation synchronous with an externally inputted clock signal
US6055209A · kind A · utility
15Cited by
3References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 29, 1998 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Jun 29, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A synchronous semiconductor memory device has a pseudo internal command signal generator for generating a pseudo internal command signal which controls, in non-synchronizing with an externally inputted clock signal, an internal command signal having been generated in synchronizing with the externally inputted clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.