Continuously adjusted-bandwidth discrete-time phase-locked loop
US6055231A · kind A · utility
37Cited by
18References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1997 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Jun 9, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2027/0081
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A continuously adjusted bandwidth phase-locked loop is used by a B-CDMA.TM. receiver to correct for any deviation, or offset, that may exist between the received radio frequency (RF) carrier signal and the frequency of the first stage LO that converts the received RF carrier signal to an intermediate frequency (IF). The PLL in the receiver includes a filter with an adjustable bandwidth. A wider bandwidth is used during initial acquisition of the received signal. After the PLL has acquired the received carrier signal using the wider bandwidth, the bandwidth of the filter is gradually narrowed to provide a low steady-state error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.