Synchronization circuit for transferring pointer between two asynchronous circuits
US6055285A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 17, 1997 |
| Grant date | Apr 25, 2000 |
| Priority date | — |
| Expiry date | Nov 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/062
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A synchronization circuit synchronizes the transfer of pointer values from a transmitting circuit operating in a first clock domain to a receiving circuit operating in a second clock domain, wherein the first clock domain and the second clock domain are mutually asynchronous. An input latch operating in response to a first synchronization signal generated in the first clock domain transfers a pointer value to a latched pointer bus. The first synchronization signal is provided as an input to a synchronization section which generates a second synchronization signal in the second clock domain. The second synchronization signal enables an output latch to transfer the pointer value on the latched pointer bus to an output bus. The pointer value on the output bus is thus synchronized in the second clock domain. The second synchronization signal is then provided as an input to a synchronization section which generates the first synchronization signal in the first clock domain. The first synchronization signal initiates the transfer of the next pointer value to the latched pointer bus. The synchronization circuit operates alternately to generate the first synchronization signal in the first…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.