Method and apparatus for performing voltage sampling
US6057713A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 12, 1998 |
| Grant date | May 2, 2000 |
| Priority date | — |
| Expiry date | Mar 12, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method and apparatus for performing voltage sampling. The present invention addresses the problems encountered when a voltage is applied to a voltage sampling circuit (76). An additional capacitor (88) is used to store an amount of charge similar to the amount of charge needed by a primary capacitor (89) which provides an output signal to a voltage receiving circuit (74), such as a portion of a sigma-delta analog to digital converter. The additional capacitor (88) is charged while a primary capacitor (89) is discharged in a first clock phase. Then the additional capacitor (88) and the primary capacitor (89) are both coupled to the voltage to be sampled during a second clock phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.