Digital decimation filter and method for achieving fractional data rate reduction with minimal hardware or software overhead
US6057793A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 1998 |
| Grant date | May 2, 2000 |
| Priority date | — |
| Expiry date | Jun 12, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0671
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter is provided for producing digital signal representative of analog signals. Noise induced upon the digital signals can be substantially removed using a digital decimation filter. The decimation filter includes a front-end portion which receives the digital data at a relatively high sample rate and performs filtering operations with minimal complexity. Preferably, the front-end portion includes at least one stage of filtering and more preferably at least two filter stages, each of which perform interpolation separate from decimation. According to one embodiment, the first stage of the front-end portion involves decimation and the latter stage or stages of that portion involves a combination of interpolation and decimation. The cumulative effect is to reduce the sample rate of the incoming data stream produced by, for example, a quantizer to a value which can be more easily manipulated by the back-end portion of the digital decimation filter. The front-end portion can therefore reduce the data rate change factor K to a smaller, fixed integer data rate change factor K.sub.1, regardless of whether data rate change factor K is an integer number or involves …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.