Multi-GB/S data pulse receiver
US6058144A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 3, 1998 |
| Grant date | May 2, 2000 |
| Priority date | — |
| Expiry date | Apr 3, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A data pulse receiver for detecting and amplifying substantially attenuated data pulses received at gigabit-per-second rates from a differential coupler with outputs having asymmetrical dc characteristics. The receiver, in a preferred embodiment, has grounded base differential amplifiers to give impedance matching, a biasing resistor connected to a separate ground terminal for biasing one of the differential amplifiers, and a matching resistor, connected at only one of its terminals, to compensate for the stray capacitance of the biasing resistor. A regenerative flip-flop with programmable tail current provides hysteresis in order to suppress unwanted noise. The receiver may also include means for automatic adjustment of the hysteresis level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.