Method for making a semiconductor device with improved sidewall junction capacitance
US6060372A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1997 |
| Grant date | May 9, 2000 |
| Priority date | — |
| Expiry date | Mar 21, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device (10) of the present invention has a gate (32) insulatively disposed above the substrate, source and drain regions (36, 38) disposed near the surface in the substrate adjacent opposite sides of the gate (32), and a field oxide region (26) disposed in the surface of the substrate surrounding the source and drain regions (36, 38) and defining an active moat region (20). The channel stop region (24) is disposed below the field oxide region (26) and is spaced from the active moat region (20) with a predetermined spacing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.