Power transistor having vertical FETs and method for making same
US6060746A · kind A · utility
54Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 11, 1997 |
| Grant date | May 9, 2000 |
| Priority date | — |
| Expiry date | Feb 11, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/2255
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power transistor having of a plurality of vertical MOSFET devices combined in parallel to achieve high-performance operation and methods of fabricating this device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.