Method and apparatus for moving data packets between networks while minimizing CPU intervention using a multi-bus architecture having DMA bus
US6061748A · kind A · utility
12Cited by
6References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 1997 |
| Grant date | May 9, 2000 |
| Priority date | — |
| Expiry date | Dec 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a data processing system comprising: a CPU; a system memory; a plurality of network interfaces; a CPU bus connected to the system memory and to each of the network interface for initialization and control of the network interfaces by the CPU; an individual DMA bus connected to each of corresponding network interfaces and to the system memory; each of the network interfaces is connectable to an external network, whereby data can be transferred by the data processing system from one network to another using system memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.