Semiconductor memory device
US6064611A · kind A · utility
35Cited by
2References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 6, 1998 |
| Grant date | May 16, 2000 |
| Priority date | — |
| Expiry date | Apr 6, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5642
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes memory cells, a bitline connected to the memory cells, a read circuit including a precharge circuit, and a first transistor connected between the bitline and the read circuit, wherein a first voltage is applied to a gate of the first transistor when the precharge circuit precharges the bitline, and a second voltage which is different from the first voltage is applied to the gate of the first transistor when the read circuit senses a change in a voltage of the bitline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.