Method and apparatus for masking modulo exponentiation calculations in an integrated circuit
US6064740A · kind A · utility
71Cited by
12References
15Claims
0Family size
Inventors
Key dates
| Filing date | Nov 12, 1997 |
| Grant date | May 16, 2000 |
| Priority date | — |
| Expiry date | Nov 12, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/7261
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuitry which performs modular mathematics to solve the equation C=M.sup.k mod n and n is performed in a manner to mask the exponent k's signature from timing or power monitoring attacks. The modular exponentation function is performed in a normalized manner such that binary ones and zeros in the exponent are calculated by being modulo-squared and modulo-multiplied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.