Method of manufacturing a semiconductor wafer
US6066565A · kind A · utility
16Cited by
3References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 1998 |
| Grant date | May 23, 2000 |
| Priority date | — |
| Expiry date | Nov 19, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A sliced wafer 1a is obtained by cutting it off from a semiconductor ingot. The rear and front surfaces of the sliced wafer 1a are flattened by the first double side simultaneous grinding process so as to remove unevenness 12a. The ground rear and front surfaces of the sliced wafer 1a whose unevenness 12a has been removed are subject to the second double side simultaneous grinding process. The flattened back side surface of the sliced wafer 1b is sucked so as to chamfer the outer peripheral portion 1b of the sliced wafer 1b. Then, the surface of the chamfered wafer 1c is etched.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.