Electrically erasable non-volatile memory cell with no static power dissipation
US6067252A · kind A · utility
5Cited by
6References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 26, 1999 |
| Grant date | May 23, 2000 |
| Priority date | — |
| Expiry date | May 26, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0433
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electrically erasable non-volatile memory cell dissipates virtually no power by disabling a pull-up current when the non-volatile memory cell is programmed. In one embodiment, to properly initialize the electrically erasable non-volatile memory cell, the power of an inverting output buffer is provided only after the pull-up circuit substantially completes pulling up an input terminal of the inverting output buffer. In one embodiment, the electrically erasable non-volatile memory cell is used in a programmable integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.