Seal system
US6069563A · kind A · utility
Inventors
Key dates
| Filing date | Mar 4, 1997 |
| Grant date | May 30, 2000 |
| Priority date | — |
| Expiry date | Mar 4, 2017 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T70/461
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The seal system is comprised of a custom integrated circuit utilizing a special CMOS gate-array technology that can be utilized to build inexpensive tamper-resistant electronic seals. The electronic circuit includes a special analog as well as digital, single-chip circuitry that senses the state of the seal, and when interrogated, transmits that state via a 35-bit data word to a seal reader device, allowing remote monitoring and control of containers and expensive goods. Any attempt to tamper with the seal will be recorded in the circuit for later transmittal to the hand-held seal reader/verifier. Each seal has a unique 20-bit identification number, combined with a 6-bit random seal code and a 6-bit resistance value. The seal electronics may be utilized in a way to provide several types of seals, namely, a shipping container seal, an event triggering seal, and event logging seal, and a tamper-proof seal as well as combinations thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.