Compound semiconductor apparatus and method for manufacturing the apparatus
US6071780A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 1999 |
| Grant date | Jun 6, 2000 |
| Priority date | — |
| Expiry date | Apr 5, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An undoped GaAs layer and a GaAs active layer are formed on a GaAs semiconductor substrate in that order, and a surface of the GaAs active layer is inactivated. Thereafter, a wafer composed of the GaAs semiconductor substrate, the undoped G&As layer and the GaAs active layer is annealed at temperatures ranging from 570 to 580.degree. C. in a molecular beam epitaxy apparatus. Thereafter, the wafer is maintained at temperatures ranging from 350 to 500.degree. C., and an insulating layer made of amorphous GaAs is formed on the GaAs active layer while using tertiary-butyl-gallium-sulfide-cubane "((t-Bu)GaS).sub.4 " as a source of the insulating layer. Thereafter, the insulating layer is patterned according to a photo-lithography method to form a gate insulating layer on the GaAs active layer. Thereafter, a source electrode and a drain electrode are formed on both sides of the gate insulating layer to arrange the source and drain electrodes separated from each other on the GaAs active layer, and a gate electrode is formed on the gate insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.