Computational circuit
US6073149A · kind A · utility
2Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1998 |
| Grant date | Jun 6, 2000 |
| Priority date | — |
| Expiry date | Apr 15, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/386
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computational circuit for a multi-value addition comprising a parallel adder, an output adder, a quantizing portion and a logic conversion portion. Addition circuits in the above adders and thresholding circuits in the above quantizing portion consist of voltage-driven circuits including capacitive couplings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.