Apparatus and method for manufacturing a semiconductor device having hemispherical grains
US6074486A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 1998 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Apr 20, 2018 |
Classification
- Technology area (CPC C)Chemistry; Metallurgy
- CPC primaryC23C16/45578
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
An apparatus and method for forming a HSG silicon layer on a capacitor lower electrode of a semiconductor memory device. The apparatus includes a processing chamber having a plurality of source gas supply nozzles, the lengths of the nozzles being different from one another so as to uniformly supply a source gas. A loadlock chamber is placed under the processing chamber. A boat loaded with wafers is moved from the loadlock chamber to the processing chamber, with the boat being rotated while the source gas is supplied. The processing chamber and loadlock chambers are connected to a vacuum system having two vacuum pumps for maintaining a vacuum in the chambers. A third vacuum pump, connected to the processing chamber, is operated when the vacuum in the processing chamber reaches a predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.