Patent · US Expired

Low power digital CMOS compatible bandgap reference

US6075407A · kind A · utility

33Cited by
10References
15Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 28, 1997
Grant dateJun 13, 2000
Priority date—
Expiry dateFeb 28, 2017

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05F3/30
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

An improved bandgap reference circuit that uses ratioed current mirrors to provide loop gain and minimize the offset sensitivity of the loop amplifier. Furthermore, the combination of both current and diode area ratioing provides a larger effective .DELTA.V.sub.be which in turn reduces circuit sensitivities to resistor ratio values. The circuit features a high gain folded cascode amplifier for fast response, and stable start-up and power down modes. The circuit design required no trims, calibrations, or adjustments using a standard submicron digital CMOS fabrication process, and achieved a simulated reference output level with less than 1% drift over time, temperature, and process variations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.