Binary rate multiplier
US6076096A · kind A · utility
2Cited by
13References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 1998 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Jan 13, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/68
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A rate multiplier for rate multiplying a pulse train comprising: an accumulator, a multiplexer for selecting one of a first and a second number of different signs to feed to the accumulator, and a pulse train gate for providing or blocking the pulse train, wherein the multiplexer and the pulse train gate are controlled by the MSB output signal of the accumulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.