Monitoting system for electronic control unit
US6076172A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 1997 |
| Grant date | Jun 13, 2000 |
| Priority date | — |
| Expiry date | Apr 9, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/0757
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Accompanied by turning on power, power ON reset pulse from a power ON reset generation circuit is input to CPU and a fail determining circuit. After receiving the power ON reset pulse, the fail determining circuit intentionally outputs a fail detection signal. The CPU intentionally stops output of PRUN signal after confirming that fail detection signal. WDT confirms that output of the PRUN signal from the CPU is stopped in a predetermined time interval T and outputs PRUN abnormality signal. A reset pulse generation circuit confirms that PRUN abnormality signal is supplied from the WDT and outputs a reset pulse. A fail determining circuit receives a reset pulse and stops output of fail detection signal. When the fail determining circuit stops output of the fail detection signal, the CPU determines that the WDT, the reset pulse generation circuit and the fail determining circuit are in normal state. Thus, this monitoring system for electronic control unit is capable of diagnosing the WDT, the reset pulse generation circuit and the fail determining circuit at the time of self-diagnosis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.