Patent · US Expired

Threshold logic with improved signal-to-noise ratio

US6078190A · kind A · utility

0Cited by

6References

2Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Werner Weber · Munich, DE
Roland Thewes · Puchheim, DE
Andreas Luck · Munich, DE

Key dates

Filing date	Aug 6, 1998
Grant date	Jun 20, 2000
Priority date	—
Expiry date	Aug 6, 2018

Classification

Technology area (CPC G)Physics
CPC primaryG06F2207/4826
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

The threshold value logic has a non-inverting circuit path (S) that and an inverting circuit path (S') are connected to at least one comparative weighting subcircuit (BC, BS). The non-inverting circuit path and the inverting circuit path preferably are of identical construction and each contain at least one neuron transistor (NT1, NT1'). The corresponding neuron transistor gates in the non-inverting circuit path and in the inverting circuit path are driven inversely with respect to one another.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.