Logic blocks with mixed low and regular V.sub.t MOSFET devices for VLSI design in the deep sub-micron regime
US6078195A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 3, 1997 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Jun 3, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0948
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Logic books with mixed low V.sub.t and regular V.sub.t devices provide a performance gain without the large increase in stand-by power of the logic book. Low V.sub.t devices are used to gain speed, and regular V.sub.t devices are used to cut off the off-current of the logic book. The optimization of mixed V.sub.t configurations is important. No single path between an output and ground can be made of all low V.sub.t devices, and no single path between the output and V.sub.dd can be made of all low V.sub.t devices. Generally, devices that are connected to V.sub.dd and ground should be regular V.sub.t devices, a low V.sub.t devices should be connected closest to the output. All low V.sub.t devices should be appropriately reversely biased in their off states. Because its merits in standby power, speed and noise margin, such mixed-low-and-regular-V.sub.t logic books can have a wide use in VLSI designs (e.g., high performance microprocessor design).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.