High current drain-to-gate clamp/gate-to-source clamp for external power MOS transistors
US6078204A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 1997 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Dec 17, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldTransport
- WIPO sectorMechanical engineering
Abstract
An external FET (12) has protection provided thereto for excessive voltages between the gate and drain and between the gate and source. A drain-to-gate clamp is provided with a plurality of series connected zener diodes (34), (36) and (38) which are connected in series with a Schottky diode (42). The current therethrough is sensed with a resistor (56) which turns on a bypass transistor (58) to shunt current around the zener diodes when an excess voltage causes them to break down. This will turn on the FET (12). The gate-to-source clamp is configured with two zener diodes (74) and (76) which are reversed biased. A series current sense resistor (82) senses the current through the diodes and turns on a transistor (84) when the current exceeds a predetermined level. This will effectively shunt current around the zener diodes (74) and (76).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.