Non-volatile semiconductor memory device
US6078522A · kind A · utility
4Cited by
5References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 1999 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Jun 18, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A non-volatile memory device of the present invention comprises a memory cell array having a plurality of cells, a plurality of dummy bit lines, a plurality of dummy word lines. At least one of the dummy bit lines includes a bulk tapping for applying bulk voltage. Here, P.sup.+ impurity is implanted into the dummy bit lines. With this improved memory structure, a device layout area can be reduced and an increase in bulk voltage resulting from hot carriers can be suppressed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.