Patent · US Expired

Timing synchronization and switchover in a network switch

US6078595A · kind A · utility

99Cited by
3References
3Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 28, 1997
Grant dateJun 20, 2000
Priority date
Expiry dateAug 28, 2017

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH04J3/0688
  • WIPO fieldTelecommunications
  • WIPO sectorElectrical engineering

Abstract

A data communications switch and method of operation are presently disclosed enabling flexible, selectable provision of a common timing signal for synchronized external communication through physical layer interfaces with other network devices, synchronized internal communications within the switch, and for uninterrupted synchronization of such communications. Synchronization of external communications is enabled by programmable selection from among plural potential timing references at redundant timing modules (TMs). An active TM provides a primary external synchronization clock; a standby TM provides a redundant timing function. Both TMs access the same references. A state signal indicates which synchronization clock is active. External interfaces derive timing from this distributed clock. Synchronized internal timing is provided by an internal clock and phase-locked loop (PLL) on each TM. The clock/PLL timing signal output is routed to other switch elements, enabling synchronized internal data transfer. Both interconnected TMs actively generate clock signals for external and internal use, enabling seamless timing switchover should conditions warrant a change in TMs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.