Data processing system having selectable exception table relocation and method therefor
US6079015A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 20, 1998 |
| Grant date | Jun 20, 2000 |
| Priority date | — |
| Expiry date | Apr 20, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system (20) has a central processing unit (CPU) (22) and a memory (30) for storing an exception table. The exception table is mapped in the memory (30) in consecutive segments, with each segment for storing a predetermined number of instructions for executing the exception. By asserting a control bit, the exception table can be relocated, or remapped, and compressed into a jump table. The jump table stores only jump instruction for branching to the exception routines, which are relocated to other memory locations. The jump table is generated from the starting addresses of the exception routines. Relocating the exception routines allows for more efficient use of internal memory space of the data processing system (20).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.