Memory error containment in network cache environment via restricted access
US6081876A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1997 |
| Grant date | Jun 27, 2000 |
| Priority date | — |
| Expiry date | Sep 22, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer memory management system that allocates each node's network cache into protected and unprotected regions. Nodes are previously configured into error containment cluster of nodes (ECCNs). Unprotected network caches may encache data accessed from any node's unprotected memory. Protected network caches may encache data accessed from nodes that are within the same ECCN, but only from a node's protected main memory. Memory address allocation techniques known in the art enable the system to know whether a processor's request for data will be found in protected or unprotected memory. Under the present invention, a node is able to first refer to network cache (protected or unprotected, as appropriate) in locating the data. If the data is not in cache, then the system refers to main memory. The present invention thus enables superior memory access advantages of cache memory techniques. At the same time, in the event of a memory error, the present invention's protected/unprotected configuration contains the corruption caused by the error. Exemplary processing logic is also disclosed enabling the present invention in a preferred embodiment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.