Method of forming capacitors in a semiconductor device
US6083805A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 19, 1999 |
| Grant date | Jul 4, 2000 |
| Priority date | — |
| Expiry date | May 19, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
A method of forming capacitors in a semiconductor device, involves providing a first insulating layer, providing a first mask with an array of apertures over the insulating layer, and etching an array of holes in the first insulating layer through said apertures in said first mask. A first electrode layer extending into the holes is formed over the first insulating layer. A second dielectric layer extends into the holes on said first electrode layer. A second electrode layer extends into the holes on the dielectric layer. The capacitors are patterned with a second mask. The capacitors can be subsequently connected into the circuit in a sequence of processing steps that only involve the addition two extra masks beyond those conventionally employed in integrated circuit manufacture.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.