Method and circuit for multiplexing an input port and an output port of a microprocessor into a single external interface
US6085260A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 8, 1998 |
| Grant date | Jul 4, 2000 |
| Priority date | — |
| Expiry date | Jun 8, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit interface for multiplexing an input port and an output port of a microprocessor into a single external interface, wherein the input port and the output port never operate at the same time, is normally active upon a battery cycle, includes a resistor network, a level shifter and a power supply. The resistor network is coupled between the output port and the single external interface for receiving an input signal from the single external interface for receipt by the input port and for receiving an output signal from the output port for receipt by the single external interface. The level shifter is coupled to the input port and the resistor network for translating the input signal from the resistor network into a second input signal recognizable by the input port. The power supply is coupled to the resistor network and the level shifter for providing power to the input port so as to enable the input port to recognize the second input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.