Method and system for load data formatting and improved method for cache line organization
US6085289A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 1997 |
| Grant date | Jul 4, 2000 |
| Priority date | — |
| Expiry date | Jul 18, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0886
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An improved load data formatter and methods for improving load data formatting and for cache line data organization are disclosed. The load data formatter includes a data selection mechanism, the data selection mechanism receiving a data cache line of a predetermined organization, and the data selection mechanism further supporting adjacent word swapping in the cache line. The load data formatter further includes at least two word selectors coupled to an output of the data selection mechanism, the at least two word selectors forming a doubleword on a chosen word boundary of the cache line. In a further aspect, the predetermined organization of the cache line is provided by grouping each corresponding bit of each byte in a cache line of data together, and expanding the grouping with an organization formed by one bit from a same byte within each word. The at least two word selectors may comprise even and odd multiplexers, and the load data formatter may also include splice registers, coupled to an output of one of the at least two selectors, which provide formatting of unaligned load access across a cache line boundary.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.