Method and apparatus for supporting power conservation operation modes
US6085325A · kind A · utility
62Cited by
24References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1996 |
| Grant date | Jul 4, 2000 |
| Priority date | — |
| Expiry date | Dec 16, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for managing power in an electronic device that receives the power from a bus is described. The apparatus comprises a clock enable circuit that disables a clock that generates nominal clock frequencies derived from raw frequencies output by an oscillator upon receiving a first signal. A time-wise independent time reference circuit is coupled to the clock enable circuit. The time-wise independent time reference circuit sends the first signal to the clock enable circuit a first predetermined period of time after receiving a signal to enter into a suspend state.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.