System and method for enhancing modem performance using digital signal processing techniques
US6085347A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 22, 1998 |
| Grant date | Jul 4, 2000 |
| Priority date | — |
| Expiry date | Dec 22, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L51/23
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
DSP error detection and filtering of a modem signal using a simple, robust, and low cost technique. The DSP technique utilizes a equalizer/filter to adjust the amplitude and phase delay of the transmitted data signal. The modem on the DSP chip may include a demodulator, parser/interpreter module, start and stop bit module, and modulator. The demodulator may include a switch, equalizer/filter, processing module, bit converter, adder, and averaging module. The averaging module computes an average value for the error signal during the frame training sequence. The error signal is the output of the bit converter minus the output of the demodulator. After each bit of the error signal is fed into the averaging module, the averaging module computes a new average. The averaging module performs an adaptive process. The average value of the error signal is compared to a threshold value. If the average value of the error is greater than the threshold value, the switch is activated by the averaging module and the equalizer/filter processes the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.