High performance dynamic multiplexers without clocked NFET
US6087855A · kind A · utility
25Cited by
5References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 1998 |
| Grant date | Jul 11, 2000 |
| Priority date | — |
| Expiry date | Jun 15, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0963
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Performance is increased within a dynamic multiplexer by removing the foot device and replacing it with a logic gate (such as an OR, NOR, or NAND gate) receiving the select signals and activating the precharge device within the dynamic multiplexer circuit. With such a configuration, crowbar current is still inhibited.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.