Precision hysteresis circuit
US6087873A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 21, 1998 |
| Grant date | Jul 11, 2000 |
| Priority date | — |
| Expiry date | Jul 21, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0377
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A switched capacitor differential comparator (10) for receiving input signals which includes hysteresis circuitry (40, and 42) and a switch (43) responsive to timed clocking pulses occurring during alternating reset and comparison periods for application of a hysteresis current during a reset period of the differential comparator which current is injected into an applicable one of a pair of load devices (22, 24) to produce a hysteresis voltage offset at a selected one of the differential inputs (30, 32) which is stored during the reset period but removed during the next comparison period so that the hysteresis voltage is not canceled but remains superimposed on the stored input signals during the next comparison period to introduce hysteresis to influence the current output decision of the comparator circuit based on the decision of the comparator resulting from the previous comparison period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.