Semiconductor device and electronic equipment having a non-volatile memory with a security function
US6088262A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 24, 1998 |
| Grant date | Jul 11, 2000 |
| Priority date | — |
| Expiry date | Feb 24, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device which can be re-used even if the read protection is set for a non-volatile memory included therein, and electronic equipment including such a semiconductor device. The data written in a memory cell array is protected from being read out from the outside for security. Only when erase of all data in the memory cell array is detected, the read protection is released. Thus, a microcomputer can be refused. The detection with respect to whether or not all data has been erased can be accomplished through execution of a flash erase operation or by reading out all address data. A read protection control circuit includes an EEPROM for storing information that the read protection is enabled. A plurality of such EEPROM's are used. If the read protection for the memory cell array is enabled, the erase/write to the EEPROM's are inhibited. The memory cell array is controlled separately from the EEPROM's. In the normal operation mode, the read-out of data by CPU is permitted. Such a configuration may be applied to a semiconductor device including a gate array block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.