Method and apparatus for segmenting memory to reduce the memory required for bidirectionally predictive-coded frames
US6088391A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 1996 |
| Grant date | Jul 11, 2000 |
| Priority date | — |
| Expiry date | May 28, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/61
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A memory system for B frames of pixel data, where each B frame includes a plurality of sections, and where each of the plurality of sections includes pixel data corresponding to the top and bottom fields of a frame. The memory system includes a memory organized into a plurality of segments for storing the pixel data, where the number of segments equals the number of frame sections plus two additional segments. However, each of the segments is half the size of a frame section. The memory system also includes a segmentation device for receiving and separating pixel data according to the top and bottom fields of each frame. The segmentation device tracks the segments to determine two available segments of said memory, and for each section of each frame, stores pixel data from the top field into one of the available segments and stores pixel data from the bottom field into the other available segment of the memory. A segment pointer table is preferably included for tracking the segments of memory for interlaced display. A decoder system includes the memory and the segmentation device, and also includes a reconstruction unit for receiving and decoding video data into pixel data, and dis…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.