One-pin shift register interface
US6088422A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 6, 1999 |
| Grant date | Jul 11, 2000 |
| Priority date | — |
| Expiry date | Jan 6, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C19/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A register using a single pin to provide two or more control signals (e.g., clock and data signals). The present invention decodes a three state input waveform to generate a clock/write signal and uses a three state clock waveform to generate a clock/read data signal. The present invention generally comprises a three-level receiver, a latch and an output driver to form a one-pin bidirectional interface used with a shift register. To write, the interface converts a three-level input signal into separate clock and data signals which drive the shift register. To read, the interface converts a bi-level input signal into a three-level output signal representing the output of the shift register. As a result, the present invention allows the programming of a device such as an erasable programmable read only memory (EPROM) in a clock chip while utilizing the fewest number of pins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.