Electronic device parameter estimator and method therefor
US6090151A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1997 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Jul 1, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A process (20) and design tool (62) are presented for the accurate prediction of design parameters (42) for components (38) of an integrated circuit (22) during the early stages of the design of that integrated circuit (22). These predicted design parameters (42) include pin count parameters (50), propagation delay parameters (52), layout area parameters (54), dynamic power parameters (56), static power parameters (58), and total power parameters (60). With these parameters, the designer interactively modifies the design prior to the layout and prototyping of the integrated circuit (22). The dynamic power parameters (56) and total power parameters (60) may be repetitively predicted with differing input items to establish a power usage pattern for the integrated circuit (22).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.