Macro cell
US6091088A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 1998 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Jan 28, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/907
Abstract
A macro cell of field effect transistors includes source-drain areas respectively divided into a contact area and a non-contact area. One source-drain area of two of the source-drain areas located on opposite sides of the effective width portion of a gate electrode has a contact area at an upper portion and a non-contact area at a lower portion while the other source-drain area has the non-contact area at its upper portion and the contact area at its lower portion. The distance between effective width portions of gate electrodes where the non-contact area is located is smaller than the distance between effective width portions of gate electrodes where the contact area is located.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.