Self gain aligning circuit and method
US6091942A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 2, 1996 |
| Grant date | Jul 18, 2000 |
| Priority date | — |
| Expiry date | Dec 2, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/3036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An K-band amplifier circuit (10) with two samplers (12, 18) coupled to detectors (22, 26) that detect an input and an output RF signal level. These two reference signals are provided to a differential gain control circuit (24) which is coupled to one or more variable gain amplifier (VGA) (14) stages. The VGAs compensate for the gain of an entire chain of amplifiers (16). When the individual amplifier gains vary for any reason, (i.e., process, temperature effects or end of life degradation) the variation in gain causes higher or lower levels of detected output reference signals for a given RF input signal. The gain control circuit (24) drives the VGA (14) up or down as appropriate. By maintaining a constant offset in input and output reference control signals, the gain control circuit (24) drives the amplifier chain (16) to a constant gain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.