Standard cell integrated circuit layout definition having functionally uncommitted base cells
US6093214A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 26, 1998 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Feb 26, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/39
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of forming a layout definition of a semiconductor integrated circuit includes generating a netlist of functionally committed standard cell instances and the electrical interconnections between the standard cell instances. The standard cell instances are then placed in a layout pattern. Also, functionally uncommitted base cells are place with the standard cell instances in the layout pattern. The base cell instances may be metalized, if needed, in later processing steps to implement design changes by adding additional logical functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.