Method of making a semiconductor device
US6093633A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 28, 1997 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Feb 28, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device manufacturing method is provided which can reduce the capacitance between adjacent wires by providing a void between wires, without sacrificing the advantage of the buried wiring method. After successively depositing an interlayer insulation film, a silicon nitride film, and a silicon dioxide film onto a silicon substrate, a wiring groove is formed. Then, after forming a contact hole, a barrier metal and aluminum film are deposited over the entire surface, these being removed from areas other than within the groove, so as to form buried wiring patterns. Then, the silicon dioxide film and silicon nitride films are etched away from areas in which the adjacent wiring space is narrow, thereby exposing the above-noted wiring pattern, after which a second silicon dioxide film is deposited over the entire surface, thereby forming a void in the area in which there is a narrow wiring space between adjacent wires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.