Recessed-gate MOSFET with out-diffused source/drain extension
US6093947A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 1998 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Aug 19, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0212
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a recessed channel/gate MOSFET structure which comprises a semiconductor wafer having a plurality of shallow trench isolation regions embedded therein, wherein between each adjacent shallow trench isolation region is a field effect transistor region which comprises a source and drain region which are spaced apart by a gate region, said gate region comprising a poly gate region which is positioned between oxide spacers, said poly gate region having a metal contact region on its top surface and a gate oxide region on its bottom surface embedded in said semiconductor wafer and wherein said source and drain regions have an extension which wraps around said oxide spacers and provides a connection with a channel region which is formed below said gate oxide region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.