Output buffer circuit
US6094067A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 16, 1997 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Sep 16, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/09429
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit is provided which comprises a level conversion circuit having a first conversion circuit for converting a control signal and an output signal to "H" and "L" signals in a first source system and a second conversion circuit for converting these into "H" and "L" signals in a second source system, a tristate control type input/output control circuit for computing the "H" and "L" signals outputted from the second conversion circuit in the second source system, and a push-pull circuit having MOS transistors Q13a and Q14, which is activated in the second source system in response to the "H" and "L" signals so as to select a tristate and output it as an input/output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.