Method and apparatus for addressing multi-bank memory
US6094397A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 1999 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Feb 9, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for addressing multi-bank memory. The method includes generating a first bank select and generating a first row address. The first row address is stored and presented as a second bank select during an activate portion of the memory cycle. During an access portion of the memory cycle, a first bank select is generated and the saved second bank select is retrieved from storage. The first bank select and retrieved second bank select identify a bank of memory. The apparatus includes a storage device for saving the second bank select. The second bank select may be stored based on the value of the first bank select.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.