Hardware-assisted firmware tracing method and apparatus
US6094730A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1997 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Oct 27, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a test and diagnosis system for testing an embedded processor. The test system includes an ASIC having an embedded microprocessor, a debug assist logic unit for monitoring the addresses and data from the embedded microprocessor, a debug kernel and an instruction overlay harness. When the debug assist logic block finds a predetermined set of match conditions, it interrupts the embedded microprocessor and transfers control from the code running on the microprocessor to the debug kernel. The debug kernel is coupled to the debug assist logic unit and responsive to user input, the debug kernel allows the user to trace processor transactions during code execution. A REMAP bit in the ASIC allows remapping of the microprocessor memory into a faster instruction overlay memory, allowing the code to be quickly modified during product debug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.