Speed-signaling testing for integrated circuits
US6094735A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 1998 |
| Grant date | Jul 25, 2000 |
| Priority date | — |
| Expiry date | Aug 3, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3016
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit has digital logic that supports two or more different processing speeds and two or more different data rates that are distinguished by each data rate having a data prefix at a different common-mode voltage. For normal processing, the integrated circuit has one or more comparators that compare the average signal voltage level with one or more reference voltages to determine the data rate. According to one embodiment of the invention, one or more muxes are configured between the comparators and the digital logic. These muxes can be controlled during testing to by-pass the operations of the comparators to pass specified digital codes to the digital logic to simulate the operations of the comparators. In this way, the different processing speeds of the digital logic can be tested without having to build special automatic test equipment to support all of the different possible voltage levels corresponding to the different supported data rates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.