Output buffer circuit with adjustable driving capability
US6097219A · kind A · utility
20Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 1998 |
| Grant date | Aug 1, 2000 |
| Priority date | — |
| Expiry date | May 4, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0005
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit drives an output terminal of an integrated circuit by means of at least two buffer circuits. A buffer control circuit in the output buffer circuit selectively enables or disables the buffer circuits to provide a driving capability suitable for the load connected to the output terminal. The buffer control circuit can decide which buffer circuits to disable by sensing the transition time of a signal output from the output terminal following a reset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.